We are looking for a skilled design engineers to architect and oversee interfacing our low-speed interfaces to our high-speed interconnect. These blocks include Boot logic, Serial Interfaces, and debug logic
Responsibilities
- Working with a small team to implement, debug, and verify Prodigy’s internal and external buses
- Building the infrastructure needed to bringup and debug the various components in FPGAs and silicon
- Working with the software team to create and verify drivers and models needed
Qualifications
- Requires 8-15 years of applicable experience (bright individuals with fewer years experience would be considered)
- Experience with integration and debug of APB, AHB, and AXI interconnects
- Development of internal logic analyzers and profilers
- Must have Verilog / SystemVerilog / Synthesis / STA / Lint experience
Benefits
- Competitive salary and benefits package.
- Opportunities for professional development and advancement.
- International environment and further career progression.
- Getting in touch with bleeding edge technology.
- Flexible working hours
- Work-life balance.
- Collaborative and supportive work environment.
If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!
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關於Tachyum
Tachyum 正在通過其最近推出的旗艦產品改變人工智慧、高效能運算、公共和私有雲端資料中心市場。 Prodigy®神童是世界上第一款通用處理器,將 CPU、GPGPU 和 TPU 的功能統一到單一一個處理器中,為專業和通用計算提供行業領先的性能、成本和能效。當在超大規模資料配置Prodigy®神童處理器時,它們使所有人工智慧、高效能運算和通用應用程式能夠在一個軟體基礎設施上執行,每年為公司節省數十億美元。