Responsibilities
- Interface and enhancements of an advanced DRAM control block
Qualifications
- Experience with RS and BCH codes
- Experience with FPGA integration and debug
- Six to ten years of relevant experience
- Background in design of DRAM interfaces
- Logic design experience using Verilog/System Verilog
- The ability to work with a culturally diverse, physically distributed team
Benefits
- Competitive salary and benefits package.
- Opportunities for professional development and advancement.
- International environment and further career progression.
- Getting in touch with bleeding edge technology.
- Flexible working hours
- Work-life balance.
- Collaborative and supportive work environment.
If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!
By sending us your application e-mail, you confirm that you have read, understand and accept the content of the Privacy Notice and consent to the processing of your data as part of this application.
关于Tachyum
Tachyum正在通过其最近推出的旗舰产品改变人工智能、高性能计算、公共和私有云数据中心市场。 Prodigy®神童是世界上第一款通用处理器，将CPU、GPGPU和TPU的功能统一到单一一个处理器中，为专业和通用计算提供行业领先的性能、成本和能效。当在超大规模数据配置Prodigy®神童处理器时，它们使所有人工智能、高性能计算和通用应用程式能够在一个软件基础设施上执行，每年为公司节省数十亿美元。