Digital Design Engineer - CPU Agent

位置:

  • 斯洛伐克布拉迪斯拉发
  • Brno, CZ

工作领域:

  • 硬件
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Responsibilities

  • Development and integration system coherence manager
  • Working on the state-of-art AI processor design

Qualifications

  • Experience with multiprocessor consistency protocols
  • Background in large-scale ASIC design
  • Six years of relevant experience
  • Experience with FPGA integration and debug
  • Logic design experience using Verilog/System Verilog
  • The ability to work with a culturally diverse, physically distributed team

Benefits

  • Competitive salary and benefits package.
  • Opportunities for professional development and advancement.
  • International environment and further career progression.
  • Getting in touch with bleeding edge technology.
  • Flexible working hours
  • Work-life balance.
  • Collaborative and supportive work environment.

If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!

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