Tachyum Prodigy Architectural Overview

Introduction

Tachyum’s Prodigy Universal Processor addresses the major challenges and pain points facing today’s data centers, including increasingly high power consumption, low server utilization, and the processor performance plateau that has occurred over the past two decades.

Prodigy, the world’s first Universal Processor, delivers a revolutionary new architecture that unifies the functionality of CPU, GPGPU, and TPU into a single monolithic device, enabling Prodigy processors to address the high demands of cloud and HPC/AI workloads, without expensive and power-hungry accelerators, by using a simple homogenous software model that is aligned with software composability and dynamic reallocation of server resources to maximize utilization.

Processor performance plateauing has its root cause in increasing wire delays on the processor silicon. As the silicon process shrinks, the transistors speed up, but the wires slow down, and we are now at the point where performance is being throttled by wire delays. Since the resistivity of a wire is a function of the cross-sectional area of the wire, the resistivity increases with the square of the process shrink, so a 10x decrease in process geometry results in a 100x increase in resistivity, which is proportional to wire delay. The industry’s conversion from aluminum to copper interconnects and the use of low K dielectrics has helped, but wire delays have still become the dominant factor limiting processor performance increases from generation to generation.

Prodigy addresses the processor performance plateau caused by slow wires with architectural innovations that minimize data transmission over the slow wires. It does this by keeping a CPU calculation and the input data required for that calculation local, thus circumventing the core problem limiting CPU performance: slow wires.