Responsibilities
- Interface and enhancements of an advanced DRAM control block
Qualifications
- Experience with RS and BCH codes
- Experience with FPGA integration and debug
- Six to ten years of relevant experience
- Background in design of DRAM interfaces
- Logic design experience using Verilog/System Verilog
- The ability to work with a culturally diverse, physically distributed team
Benefits
- Competitive salary and benefits package.
- Opportunities for professional development and advancement.
- International environment and further career progression.
- Getting in touch with bleeding edge technology.
- Collaborative and supportive work environment.
If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!
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A proposito di Tachyum
Tachyum is transforming AI, HPC, public and private cloud data center markets with its recently launched flagship product. Prodigy, the world’s first Universal Processor, unifies the functionality of a CPU, a GPU, and a TPU into a single processor that delivers industry-leading performance, cost, and power efficiency for both specialty and general-purpose computing. When Prodigy processors are provisioned in a hyperscale data center, they enable all AI, HPC, and general-purpose applications to run on one hardware infrastructure, saving companies billions of dollars per year. With data centers currently consuming over 4% of the planet’s electricity, predicted to be 10% by 2030, the ultra-low power Prodigy Universal Processor is critical to continue doubling worldwide data center capacity every four years.
Tachyum, co-founded by Dr. Radoslav Danilak is building the world’s fastest AI supercomputer (128 AI exaflops) in the EU based on Prodigy processors. Tachyum has offices in the United States and Slovakia.