We are looking for a skilled design engineers to architect and oversee interfacing our low-speed interfaces to our high-speed interconnect. These blocks include Boot logic, Serial Interfaces, and debug logic
Responsibilities
- Working with a small team to implement, debug, and verify Prodigy’s internal and external buses
- Building the infrastructure needed to bringup and debug the various components in FPGAs and silicon
- Working with the software team to create and verify drivers and models needed
Qualifications
- Requires 8-15 years of applicable experience (bright individuals with fewer years experience would be considered)
- Experience with integration and debug of APB, AHB, and AXI interconnects
- Development of internal logic analyzers and profilers
- Must have Verilog / SystemVerilog / Synthesis / STA / Lint experience
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Über Tachyum
Tachyum is transforming AI, HPC, public and private cloud data center markets with its recently launched flagship product. Prodigy, the world’s first Universal Processor, unifies the functionality of a CPU, a GPU, and a TPU into a single processor that delivers industry-leading performance, cost, and power efficiency for both specialty and general-purpose computing. When Prodigy processors are provisioned in a hyperscale data center, they enable all AI, HPC, and general-purpose applications to run on one hardware infrastructure, saving companies billions of dollars per year. With data centers currently consuming over 4% of the planet’s electricity, predicted to be 10% by 2030, the ultra-low power Prodigy Universal Processor is critical to continue doubling worldwide data center capacity every four years.
Tachyum, co-founded by Dr. Radoslav Danilak is building the world’s fastest AI supercomputer (128 AI exaflops) in the EU based on Prodigy processors. Tachyum has offices in the United States and Slovakia.