Physical Design Engineer

Responsibilities

• Responsible for implementation of ultra-high performance and low power data processing chip
• Work with RTL designers to achieve PPA goals and suggest appropriate tradeoffs Floor-planning, experimenting with placement and routing techniques for better PPA
• Do timing closure for very high frequency designs with possible hand placement of logic when needed
• Help define low latency/low skew clock tree methodology/design
• Help define appropriate power grid structures to meet EM/IR goals
• Scripting and automating flows to improve turn-around times

Qualifications

• Strong communication and interpersonal skills required to work with our global design team
• Multiple years of experience in high performance semiconductor designs is a big plus
• Verilog knowledge and an understanding of ASIC design flow
• A background in computer architecture is desirable, high interest in physical design
• The ability to learn new technologies and apply that knowledge quickly
• BS or MS Degree in Electrical Engineering or Computer Science, suitable for graduate candidates
• Highly self-motivated, very good problem solver

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